GitHub - stnolting/neorv32-verilog: ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL. - discu.eu

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GitHub - stnolting/neorv32: 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. https://github.com/stnolting/neorv32 29 comments
neorv32/README.md at main · stnolting/neorv32 · GitHub https://github.com/stnolting/neorv32/blob/main/README.md 6 comments

Linked pages

GitHub - stnolting/neorv32: 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. https://github.com/stnolting/neorv32 29 comments
GitHub - steveicarus/iverilog: Icarus Verilog https://github.com/steveicarus/iverilog 11 comments

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