Hacker News
- Making open source hardware design a reality https://github.com/aolofsson/awesome-hardware-tools 36 comments
Linking pages
- GitHub - jnv/lists: The definitive list of lists (of lists) curated on GitHub and elsewhere https://github.com/jnv/lists 28 comments
- GitHub - rajesh-s/computer-engineering-resources: A curated list of Computer Engineering resources https://github.com/rajesh-s/awesome-computer-architecture/ 0 comments
Linked pages
- GitHub - FreeCAD/FreeCAD: This is the official source code of FreeCAD, a free and opensource multiplatform 3D parametric modeler. https://github.com/FreeCAD/FreeCAD 288 comments
- GitHub - Z3Prover/z3: The Z3 Theorem Prover https://github.com/Z3Prover/z3 143 comments
- GitHub - sylefeb/Silice: Silice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures. https://github.com/sylefeb/Silice 21 comments
- GitHub - myhdl/myhdl: The MyHDL development repository https://github.com/myhdl/myhdl 16 comments
- GitHub - olofk/edalize: An abstraction library for interfacing EDA tools https://github.com/olofk/edalize 16 comments
- GitHub - FPGAwars/icestudio: Visual editor for open FPGA boards https://github.com/FPGAwars/icestudio 9 comments
- GitHub - verilator/verilator: Verilator open-source SystemVerilog simulator and lint system https://github.com/verilator/verilator 7 comments
- GitHub - B-Lang-org/bsc: Bluespec Compiler (BSC) https://github.com/B-Lang-org/bsc 4 comments
- GitHub - enjoy-digital/litex: Build your hardware, easily! https://github.com/enjoy-digital/litex 3 comments
- GitHub - olofk/fusesoc: Package manager and build abstraction tool for FPGA/ASIC development https://github.com/olofk/fusesoc 2 comments
- GitHub - intel/rohd: The Rapid Open Hardware Development (ROHD) framework is a framework for describing and verifying hardware in the Dart programming language. https://github.com/intel/rohd 2 comments
- GitHub - JulianKemmerer/PipelineC: A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature. https://github.com/JulianKemmerer/PipelineC 1 comment
- GitHub - ChampSim/ChampSim: ChampSim repository https://github.com/ChampSim/ChampSim 1 comment
- GitHub - yaqwsx/PcbDraw: Convert your KiCAD board into a nicely looking 2D drawing suitable for pinout diagrams https://github.com/yaqwsx/PcbDraw 1 comment
- GitHub - chipsalliance/firrtl: Flexible Intermediate Representation for RTL https://github.com/chipsalliance/firrtl 1 comment
- GitHub - siliconcompiler/siliconcompiler: A modular build system for hardware https://github.com/siliconcompiler/siliconcompiler 0 comments
- GitHub - YosysHQ/nextpnr: nextpnr portable FPGA place and route tool https://github.com/YosysHQ/nextpnr 0 comments
- GitHub - ferrandi/PandA-bambu: PandA-bambu public repository https://github.com/ferrandi/PandA-bambu 0 comments
- GitHub - j0ono0/pinout: An open source Python package that generates hardware pinout diagrams as SVG images. https://github.com/j0ono0/pinout 0 comments
- GitHub - wavedrom/wavedrom: Digital timing diagram rendering engine https://github.com/wavedrom/wavedrom 0 comments
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