- ReonV is a RISC-V open source CPU, licensed under GPL v3 and forked from LEON3 https://github.com/lcbcFoo/ReonV 5 comments opensource
Linking pages
- GitHub - riscvarchive/riscv-cores-list: RISC-V Cores, SoC platforms and SoCs https://github.com/riscvarchive/riscv-cores-list 11 comments
- GitHub - suryakantamangaraj/AwesomeRISC-VResources: It contains a curated list of awesome RISC-V Resources. https://github.com/suryakantamangaraj/AwesomeRISC-VResources?tab=readme-ov-file#cores 8 comments
- arl/README-VHDL.md at master · kaxap/arl · GitHub https://github.com/kaxap/arl/blob/master/README-VHDL.md 2 comments
- GitHub - riscvarchive/riscv-cores-list: RISC-V Cores, SoC platforms and SoCs https://github.com/riscv/riscv-cores-list 0 comments
Linked pages
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