Hacker News
- Weak vs. Strong Memory Models (2012) https://preshing.com/20120930/weak-vs-strong-memory-models/ 14 comments
Linking pages
- An Introduction to Lock-Free Programming http://preshing.com/20120612/an-introduction-to-lock-free-programming 115 comments
- This Is Why They Call It a Weakly-Ordered CPU http://preshing.com/20121019/this-is-why-they-call-it-a-weakly-ordered-cpu 109 comments
- Can Reordering of Release/Acquire Operations Introduce Deadlock? http://preshing.com/20170612/can-reordering-of-release-acquire-operations-introduce-deadlock/ 14 comments
- Porting Takua Renderer to 64-bit ARM- Part 1 https://blog.yiningkarlli.com/2021/05/porting-takua-to-arm-pt1.html 10 comments
- The Purpose of memory_order_consume in C++11 https://preshing.com/20140709/the-purpose-of-memory_order_consume-in-cpp11/ 9 comments
- The Synchronizes-With Relation http://preshing.com/20130823/the-synchronizes-with-relation 4 comments
- Memory Ordering at Compile Time http://preshing.com/20120625/memory-ordering-at-compile-time/ 0 comments
- Memory barriers in ARM64 https://kunalspathak.github.io/2020-07-25-ARM64-Memory-Barriers/ 0 comments
- Acquire and Release Semantics http://preshing.com/20120913/acquire-and-release-semantics/ 0 comments
- Fixing GCC's Implementation of memory_order_consume http://preshing.com/20141124/fixing-gccs-implementation-of-memory_order_consume/ 0 comments
- Memory Barriers Are Like Source Control Operations https://preshing.com/20120710/memory-barriers-are-like-source-control-operations/ 0 comments
- Introducing Mintomic: A Small, Portable Lock-Free API http://preshing.com/20130505/introducing-mintomic-a-small-portable-lock-free-api 0 comments
- std::atomic from bottom up https://blog.the-pans.com/std-atomic-from-bottom-up/ 0 comments
- Acquire and Release Fences http://preshing.com/20130922/acquire-and-release-fences/ 0 comments
Linked pages
- A Look Back at Single-Threaded CPU Performance http://preshing.com/20120208/a-look-back-at-single-threaded-cpu-performance/ 140 comments
- An Introduction to Lock-Free Programming http://preshing.com/20120612/an-introduction-to-lock-free-programming 115 comments
- Memory Reordering Caught in the Act https://preshing.com/20120515/memory-reordering-caught-in-the-act/ 86 comments
- Relaxed-Memory Concurrency http://www.cl.cam.ac.uk/~pes20/weakmemory/ 1 comment
- Memory Ordering at Compile Time http://preshing.com/20120625/memory-ordering-at-compile-time/ 0 comments
- Acquire and Release Semantics http://preshing.com/20120913/acquire-and-release-semantics/ 0 comments
- Memory Barriers Are Like Source Control Operations https://preshing.com/20120710/memory-barriers-are-like-source-control-operations/ 0 comments
- http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html 0 comments
- Validating Memory Barriers and Atomic Instructions [LWN.net] http://lwn.net/Articles/470681/ 0 comments
- “Strong” and “weak” hardware memory models – Sutter’s Mill http://herbsutter.com/2012/08/02/strong-and-weak-hardware-memory-models/ 0 comments
- What is RCU, Fundamentally? [LWN.net] http://lwn.net/Articles/262464/ 0 comments
- Out-of-order execution - Wikipedia https://en.wikipedia.org/wiki/Out-of-order_execution 0 comments
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