Hacker News
- BitNetMCU: Neural Networks on the "10-cent" RISC-V MCU without Multiplier https://cpldcpu.wordpress.com/2024/04/24/implementing-neural-networks-on-the-10-cent-risc-v-mcu-without-multiplier/ 0 comments
- US investigates China's access to RISC-V https://www.tomshardware.com/tech-industry/us-investigates-chinas-access-to-risc-v-open-source-instruction-set-may-become-new-site-of-us-china-chip-war 2 comments
- RISC-V Origins and Architecture, Part 1 https://thechipletter.substack.com/p/risc-v-part-1-origins-and-architecture 29 comments
- High performance RISC-V CPU https://www.ventanamicro.com/technology/risc-v-cpu-ip/ 22 comments
- Gem5 Simulator – Alpha, ARM, Sparc, MIPS, Power, RISC-V and x86 VM/emulator https://www.gem5.org/about/ 3 comments
- Programming with RISC-V Vector Instructions https://gms.tf/riscv-vector.html 35 comments
- RISC-V OS using Rust: Graphics https://blog.stephenmarz.com/2020/07/24/risc-v-os-using-rust-graphics/ 34 comments
- Pine64 announce the Pinecil, TS100 compatible RISC-V soldering iron https://www.pine64.org/2020/07/15/july-updatepmos-ce-pre-orders-and-new-pinephone-version/ 76 comments
Lobsters
- A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs https://www.youtube.com/watch?v=3-c4C_L2PRQ 2 comments security , video
- RISC-V linker relaxation in lld https://maskray.me/blog/2022-07-10-riscv-linker-relaxation-in-lld 7 comments assembly , compilers
- RISC-V With Linux 5.19 Allows Running RV32 32-bit Binaries On RV64, Adds Svpbmt https://www.phoronix.com/scan.php?page=news_item&px=Linux-5.19-RISC-V 16 comments riscv
- China is really going to be pushing the RISC-V wave internally... https://www.theregister.com/2021/12/06/china_riscv/ 25 comments riscv
- Kneron’s RISC-V AI Chip Intends to Bring L1 and L2 Autonomy to “Any Vehicle” https://www.allaboutcircuits.com/news/knerons-risc-v-ai-chip-intends-to-bring-level-1-and-level-2-autonomy-to-any-vehicle/ 10 comments riscv
- RISC-V mentioned multiple times in the EU's new study on the impact of open source software and hardware on technological independence, competitiveness and innovation. https://digital-strategy.ec.europa.eu/en/library/study-about-impact-open-source-software-and-hardware-technological-independence-competitiveness-and 2 comments riscv
- PineDio Stack BL604 RISC-V Board: Testing The Prototype https://lupyuen.github.io/articles/pinedio 2 comments riscv
- Tom's Hardware: "Researchers Develop RISC-V Chip for Quantum-Resistant Encryption" https://www.tomshardware.com/news/researchers-develop-chip-for-quantum-resistant-security 7 comments riscv
- Nezha RISC-V Linux SBC launched for $99 and up - CNX Software https://www.cnx-software.com/2021/05/20/nezha-risc-v-linux-sbc/ 11 comments riscv
- Onio.Zero RISC-V microcontroller functions on harvested energy https://atmega32-avr.com/onio-zero-risc-v-microcontroller-functions-on-harvested-energy 4 comments riscv
- RISC-V International to give away 1,000 RISC-V development boards https://www.cnx-software.com/2021/05/03/the-risc-v-foundation-to-give-away-1000-risc-v-development-boards/ 18 comments riscv
- Allwinner set to release low-cost single-board computer with RISC-V processor in May https://www.notebookcheck.net/Allwinner-set-to-release-low-cost-single-board-computer-with-RISC-V-processor-in-May.532139.0.html 31 comments riscv
- RISC-V Extension Boasts Dramatic Improvements in Ultra-Low Power IoT Wireless Signal Processing https://www.hackster.io/news/risc-v-extension-boasts-dramatic-improvements-in-ultra-low-power-iot-wireless-signal-processing-b54b9fd5ce27 10 comments riscv
- Is there any graphical web browser compatible with RISC-V? https://bugs.webkit.org/show_bug.cgi?id=224134 9 comments riscv
- Intel's tilt to foundry opens a door to upstart RISC-V technology | ZDNet https://www.zdnet.com/article/intels-tilt-to-foundry-opens-a-door-to-upstart-risc-v-technology/ 2 comments riscv
- Wait, What? MIPS Becomes RISC-V https://www.eejournal.com/article/wait-what-mips-becomes-risc-v/ 7 comments riscv
- Wave Computing Rebrands to MIPS, Embraces RISC-V For Next-Gen Cores https://abopen.com/news/wave-computing-rebrands-to-mips-risc-v/ 17 comments riscv
- A free GPU for RISC-V, RV64X https://www.pixilica.com/copy-of-home 10 comments riscv
- Free Open Source GPU Under Development for RISC-V https://www.tomshardware.com/news/risc-v-open-source-gpu-nvidia-intel-amd-arm-imagination 21 comments riscv
- Rediscovering RISC-V: Apple M1 sparks renewed interest in non-x86 architectures | ZDNet https://www.zdnet.com/article/what-risc-v-and-why-you-should-care/ 2 comments riscv
- RISC-V Vector Extension Joke? https://www.nsf.gov/news/mmg/media/images/cray_h.jpg 5 comments riscv
- Could you run RISC-V on an ARM MacBook https://twitter.com/_AlexGraf/status/1333250417891942403 6 comments riscv
- RISC-V ready to take on Arm and x86 as its chips go mainstream https://techmonitor.ai/hardware/silicon/risc-v-arm-nvidia-intel-open-source 14 comments riscv
- PicoRio: the Raspberry Pi-like Small-Board Computer for RISC-V https://riscv.org/blog/2020/11/picorio-the-raspberry-pi-like-small-board-computer-for-risc-v/ 22 comments riscv
- SiFive unveils plan for Linux PCs with RISC-V processors https://venturebeat.com/2020/10/29/sifive-unveils-plan-for-linux-pcs-based-on-risc-v-processors/ 6 comments riscv
- Why Universities Want RISC-V https://www.eejournal.com/article/why-universities-want-risc-v/ 9 comments riscv
- A Comparison between WebAssembly and RISC-V https://medium.com/@losfair/a-comparison-between-webassembly-and-risc-v-e8fb9d37e6cc 12 comments riscv
- RISC-V: Will There Be Other Open-Source Cores? https://semiengineering.com/risc-v-will-there-be-other-open-source-cores/ 4 comments riscv
- SiFive Launches 7 Series, Their Highest Performance RISC-V Cores – WikiChip Fuse https://fuse.wikichip.org/news/1775/sifive-launches-7-series-their-highest-performance-risc-v-cores/ 4 comments hardware
- Design of the RISC-V Instruction Set Architecture [pdf] http://www.eecs.berkeley.edu/~waterman/papers/phd-thesis.pdf 55 comments linux
- ARM responds to RISC-V's "A Case for Open ISAs" with "The Case for Licensed Instruction Sets" https://blog.riscv.org/2014/09/arms-rebuttal-to-risc-v-the-case-for-licensed-instruction-sets/ 17 comments opensource
- Question regarding ADD instructions in 3 operand RISC machines in assembly https://www.reddit.com/r/learnprogramming/comments/5ylydb/question_regarding_add_instructions_in_3_operand/ 4 comments learnprogramming