Hacker News
- TPU/RPU Series (Make CPU from FPGA) http://labs.domipheus.com/blog/tpu-series-quick-links/ 2 comments
- Designing a RISC-V CPU in VHDL: Arty S7 RPU SoC http://labs.domipheus.com/blog/designing-a-risc-v-cpu-in-vhdl-part-16-arty-s7-rpu-soc-block-rams-720p-hdmi/ 32 comments
- Designing a CPU in VHDL, Part 6: Program Counter, Instruction Fetch, Branching http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-6-program-counter-instruction-fetch-branching/ 21 comments
- Designing a CPU in VHDL, Part 2: Xilinx ISE Suite, Register File, Testing http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-2-xilinx-ise-suite-register-file-testing/ 12 comments
- Designing a CPU in VHDL, Part 1: Rationale, Tools, Method http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-1-rationale-tools-method/ 43 comments
- Teensy Z80 Part 1 – Intro, Memory, Serial I/O and Display http://labs.domipheus.com/blog/teensy-z80-part-1-intro-memory-serial-io-and-display/ 16 comments
- Designing a CPU in VHDL, Part 6: Program Counter, Instruction Fetch, Branching http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-6-program-counter-instruction-fetch-branching 63 comments programming
- Designing a CPU in VHDL, Part 1: Rationale, tools, method http://labs.domipheus.com/blog/designing-a-cpu-in-vhdl-part-1-rationale-tools-method/ 7 comments programming
- Breadboard Z80 computer with SD and screen using a Teensy3.1 as controller (with arduino code) http://labs.domipheus.com/blog/teensy-z80-part-4-vram-explained-display-modes-simple-shell/ 3 comments arduino
- My super thin Pi+Touchscreen+WiFi server now runs in under 1 watt of power - #PiOnTheWall build log. http://labs.domipheus.com/blog/pi-on-the-wall-wall-mounted-home-server-part-3-reducing-power-consumption/ 16 comments raspberry_pi
- Pi On The Wall – home server – 10mm thin including touchscreen http://labs.domipheus.com/blog/pi-on-the-wall-wall-mounted-home-server-part-2-diet-pi/ 37 comments raspberry_pi