Linking pages
- GitHub - nviennot/stm32-emulator https://github.com/nviennot/stm32-emulator 31 comments
- Reverse engineering the Motorola Sensorhub: Part 1 https://ristovski.github.io/posts/moto-sensorhub/ 12 comments
- GitHub - mikeroyal/RISC-V-Guide: RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware. https://github.com/mikeroyal/RISC-V-Guide 10 comments
- Antmicro · Zephyr FPGA controller https://antmicro.com/blog/2021/07/zephyr-fpga-controller/ 9 comments
- GitHub - betrusted-io/xous-core: The Xous microkernel https://github.com/betrusted-io/xous-core 7 comments
- GitHub - riscvarchive/riscv-software-list: The RISC-V software tools list, as seen on riscv.org https://github.com/riscv/riscv-software-list 5 comments
- GitHub - google/CFU-Playground: Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.github.io/CFU-Playground/ For reference docs, see the link below. https://github.com/google/CFU-Playground 4 comments
- GitHub - mikeroyal/VHDL-Guide: VHDL Guide https://github.com/mikeroyal/VHDL-Guide 2 comments
- Antmicro · Accelerating digital block design with Googleâs open source Mid-Level Synthesis XLS toolchain https://antmicro.com/blog/2023/09/accelerating-digital-block-design-with-googles-xls/ 2 comments
- Cortex-M MCU Emulation with Renode | Interrupt https://interrupt.memfault.com/blog/intro-to-renode 1 comment
- Antmicro · Antmicroâs ARVSOM RISC-V module announced https://antmicro.com/blog/2021/04/arv-som-announcement/ 1 comment
- GitHub - v8-riscv/riscv-software-list: The RISC-V software tools list, as seen on riscv.org https://github.com/v8-riscv/riscv-software-list 0 comments
- Balancing Test Coverage vs. Overhead | Interrupt https://interrupt.memfault.com/blog/testing-vs-overhead 0 comments
- JLPEA | Free Full-Text | Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype | HTML https://www.mdpi.com/2079-9268/12/4/52/htm 0 comments
- Antmicro · Fully deterministic Linux + Zephyr/micro-ROS testing in Renode https://antmicro.com/blog/2022/07/fully-deterministic-linux-zephyr-micro-ros-testing-in-renode/ 0 comments