GitHub - tommythorn/Reduceron: FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome. - discu.eu

Reddit

Would there be any benefits to building a computer based on Lambda Calculus? https://github.com/tommythorn/Reduceron 35 comments 31/1/2022 compsci

Linked pages

The Reduceron http://www.cs.york.ac.uk/fp/reduceron/ 54 comments

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